1. Field of the Invention
This invention relates to an image signal processing device for processing an image signal.
2. Description of the Related Art
A clamping circuit has heretofore been used for an image signal processing device. The clamping circuit is arranged to form clamp pulses in synchronism with a composite synchronizing signal which is separated from an image signal and to clamp the image signal in accordance with the clamp pulses.
The composite synchronizing (hereinafter referred to as sync) signal can be accurately separated if the clamping process on the image signal is accurately and instantly carried out upon completion of build-up of the device. Then, the clamp pulses which are formed by using the accurate composite sync signal enable the clamping circuit to normally operate.
If the image signal is not accurately clamped, the clamp pulses cannot be accurately formed, because the composite sync signal cannot be separated from the image signal. Under such a condition, the clamping circuit fails to normally carry out a pulse clamping process.
Further, some of the conventional devices for processing image signals have been arranged to reproduce an image signal recorded on a recording medium and to digitize the reproduced image signal before processing.
FIG. 1 of the accompanying drawings shows in outline the arrangement of the conventional image signal processing device. The device includes an input terminal 50 which is arranged to receive a reproduced image signal; a dropout compensation circuit 51; a sync signal separation circuit 52; a pulse clamping circuit 53; an A/D converter 54; a digital signal processing circuit 55; a D/A converter 56; and an image signal output terminal 57.
Referring to FIG. 1, an image signal reproduced from a recording medium which is not shown is supplied to the dropout compensation circuit 51 through the input terminal 50. The dropout compensation circuit 51 is arranged to detect any dropout occurring in the image signal supplied and to compensate the image signal for a dropout generating period by interpolating it with a signal which is obtained by delaying the image signal by means of a delay element or the like. The image signal which is thus dropout-compensated by the dropout compensation circuit 51 is pulse-clamped by the pulse clamping circuit 53.
To prevent a faulty clamping action due to a dropout, the pulse clamping circuit 53 is arranged to perform a clamping action by using as clamp pulses the composite sync signal separated by the sync signal separation circuit 52 from the image signal which has been dropout-compensated by the dropout compensation circuit 51.
After undergoing the clamping process performed by the pulse clamping circuit 53, the image signal is digitized by the A/D converter 54. The digital image signal thus obtained is supplied to the digital signal processing circuit 55 to be subjected to digital signal processing actions such as a noise reducing process using a line memory, etc. After the digital signal processing circuit 55, the image signal is supplied to the D/A converter 56 to be converted back into an analog signal. The analog image signal is output from the output terminal 57.
However, in the conventional image signal processing device which is arranged as described above, an analog signal processing part coexists with a digital signal processing part, so that a circuit scale becomes large and the use of an IC for the circuit arrangement is made difficult. Further, the inclusion of the analog signal processing circuit not only deteriorates the stability of the circuit operation of the device in relation to temperature variations but also makes circuit adjustment, etc., difficult.